Welcome to
FTD Infocom Pvt. Ltd. Training
We have been working within the professional development training industry since 1996. We offer a unique range of training programmes focused on the development of leadership skills and personal skills. We run advanced training courses all over India and have an ever growing reputation as the ‘Hi Tech’ training company ve that no two training program are same and our programmes can be customized to meet different requirements. Our customers have been with us for our quick response on enquires, friendly and easy to work with. We aim to become partners with the companies and people for as long as we could serve in helping them attains their business goals. Our courses have a strong focus on knowledge transfer to make sure that you’re getting the most out of the training we provide. If you would like to discuss our range of training programmes or talk about customising a course for your specific needs, don’t hesitate to contact us.
Processors
- Arm CPUs (AMBA and CoreSight)
- NXP CPUs, MCUs and MPUs
- STMicroelectronics MCUs
- Texas Instruments Arm and DSP MCUs & MPUs
- Intel Host Processors
- Marvell Embedded Processors
- RISC-V processor
Connectivity
- MIPI PHYs
- General purpose buses
- Multimedia interfaces
- Mass Storage interfaces
- Avionics & Automotive buses
Network
- Network standards
- Marvell Ethernet
- Switches & Routers
Memory
- HBM memories
- DDR memories
- LPDDR memories
Programming Language
- Embedded C
- Eclipse Gcc Ide
- Iar Ide
- Keil Ide
Operating System
- Windows
- Linux
- RTOS
- Mac
- Android
Latest Courses
LPDDR5
This course aims to enable participants to design, verify or debug LPDDR5 memories and LPDDR5 controller IPs. Attendees will get a detailed understanding of the LPDDR5 Jedec standard. They will learn the protocol used to exchange data with LPDDR5 devices and they will study the analog features, particularly the various calibrations procedures.
USB 4.0
This course aims to enable participants to design, verify or debug USB4 IPs and links. Participants get a detailed understanding of the connection-oriented, tunneling architecture offered by USB4. The attendees will learn about USB4 hardware and software implementation.
PCIe Gen 4-5
This course aims to enable participants to design, verify or debug PCIE gen4 and gen5 IPs and links. Participants get a detailed understanding of the PCI Express protocol. The attendees will learn about PCI Express hardware and software implementation. Latest specifications, such as SR-IOV and L1 Power Management sub-states will be studied.
ARM v8 & ARM v8.1 Architecture
This course explains the ARM V8-A software architecture to enable participants to efficiently develop low level software, implementing the features offered by the CPU: MMU, cache, exceptions, security, virtualization and multicore.
RISC – V
This course explains the hardware and software architecture of the Risc-V to enable participants to efficiently design a SoC based on this CPU, verify it, and develop low level software, implementing the features offered by the CPU: exceptions, low power modes, assembly language.
AMBA AXI4 AND AXI5
This course aims to enable participants to design, verify or debug AXI-based IPs or interconnects. Participants get a detailed understanding of the AXI3, AXI4, and AXI5 protocols. Cache coherency protocol extensions ACE is studied. The following ARM interconnects are studied: NIC-400 (non-coherent), CCI-400 (coherent without snoop filter) and CCN-512 (with snoop filter and L3 cache).
CORTEX®-A7 / CORTEX®-A76AE
This course explains the hardware and software architecture of the Cortex-A76 to enable participants to efficiently design a SoC based on this CPU, verify it, and develop low level software, implementing the features offered by the CPU: MMU, cache, exceptions, security, virtualization and multicore.Differences between Cortex-A76 and Cortex-A76AE are highlighted.
CORTEX®-A65
This course explains the hardware and software architecture of the Cortex-A65 to enable participants to efficiently design a SoC based on this CPU, verify it, and develop low level software, implementing the features offered by the CPU: MMU, cache, exceptions, security, virtualization and multicore. Based on GCC toolchain and Trace32 debugger and simulator.Based on GCC toolchain and Trace32 debugger and simulator.
CORTEX®-A77
This course explains the hardware and software architecture of the Cortex-A77 to enable participants to efficiently design a SoC based on this CPU, verify it, and develop low level software, implementing the features offered by the CPU: MMU, cache, exceptions, security, virtualization and multicore.
CORESIGHT SOC-600
This course aims to describe all debug features offered by ARM CPUs in order to accelerate the debug time. Both CoreSight architecture and IPs will be studied.
Our Associatons
- Authorized Training Partners for ARM
- Mark Montrose - EMI EMC Training
- move.b [recognized expertise on CPUs as well as their associated connectivity and programming languages.]
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EMBEDDED
MOM
MULTIPHYSICS
LIFECYCLE MANAGEMENT
MEMS/VLSI DESIGN
PCB TOOLS
CAD/CAM
CIVIL
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